SiFive's oversubscribed series G round of financing suggests the industry's historical caution around the RISC-V architecture ...
SiFive raises $400M to advance RISC-V CPU development for data centres and AI workloads through new high-performance IP.
RISC-V was created by our founders to be similar to other open standards, driven and continually improved by collaboration and cross pollination across a broad community of innovators. This ensures ...
YouTuber bitluni likes building strange things. Head over to his channel and you can watch footage of him constructing a multi-colored LED wall made of ping pong balls and a DIY sonar scanner.
Espressif Systems is sampling its ESP32-S31 dual-core RISC-V SoC with Wi-Fi 6, Bluetooth 5.4, Thread, Zigbee, and Ethernet.
The Hong Kong and China Gas Company Limited (“Towngas”), together with a number of industry-leading enterprises and institutions, announced the official launch of the Hong Kong RISC-V Alliance (HKRVA) ...
On 15 April, 2026, Elektor is hosting a conference on RISC-V and its increasing significance for embedded and IoT systems. Ahead of the event, we spoke with one of the speakers, Marcos Codas. He is a ...
Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...
Results that may be inaccessible to you are currently showing.
Hide inaccessible results